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Match the complete marking
Include 51401946-100 and any revision or assembly number visible on the item. Keep the exact reference on your enquiry and quotation.
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Check the offered item before ordering
Request available label and connector photos. Have your maintenance team compare the offered 51401946-100 with the installed equipment and applicable Honeywell documentation.
Technical specifications for 51401946-100
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Manufacturer:Honeywell
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Product Category:DCS Systems
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Spare Part Number:51401946-100
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Weight:1.02 kg
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Tariff Code:8537101190
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Processor family:K4LCN
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Function:LCN node processing
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Memory assembly:Separate daughterboard
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Address block:TS2
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Board coordinate:21E
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Address weighting:1, 2, 4, 8, 16, 32, 64
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Removed jumper:Binary 1
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Address parity:Odd, including parity position
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History Module slot:Front slot 1; WDA arrangement
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Address selection:Processor or LCN I/O board, not both
Information
- LCN node recovery depends on retaining the processor identity, address selection and host configuration around 51401946-100.
Address selection: TS2 at board coordinate 21E
Configuration: Matched processor, memory and host I/O
The TS2 address block is located at board coordinate 21E. Its seven weighted positions represent 1 through 64 in binary weighting. Removing a jumper sets a binary 1, and the total count of removed positions, including parity, must be odd. Preserve the installed node address rather than copying an example setting.
The LCN address can be selected on the processor or on the associated LCN I/O board, with only one location active. The unused selection must be neutralized according to its jumper or switch implementation. In the WDA History Module, the processor occupies front slot 1 and the matching I/O board sits in the rear card cage; mechanical compliance, memory and software configuration must remain compatible.
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Honeywell 51401946-100 technical reference
Original Honeywell excerpt - PDF, 5 pages, 27.7 KB. The identity and address-selection information applies to 51401946-100. Host-slot and peripheral relationships describe the WDA History Module arrangement; other hosts require their own installation mapping. -
Honeywell 51401946-100 installation planning guide
Prepared by Apter Power - PDF, 5 pages, 96 KB. Identity, configuration, connection and controlled acceptance planning.
Platform applications: The following applications describe K4LCN node architecture functions. Match the complete 51401946-100 identity to the installed system before selecting a replacement.
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History-node processing
Maintain the configured LCN node processing path used by the host History Module; disks and peripheral controllers remain separate assemblies. -
Network addressing
Retain the assigned LCN address and the single active address-selection location in the installed node. -
Host restoration
Match the processor board, memory arrangement, I/O board and software personality before restoring the node. -
Controlled maintenance
Record the existing jumpers and host configuration, then verify node communication after replacement.
Match the full part number, board revision and installed node personality before replacement.
Record all binary address and parity positions before removing the original board.
Select the address on one approved board only; neutralize the unused selection location as specified for that hardware.
Confirm the required memory assembly separately; do not infer supplied memory from a related processor designation.
Follow the host shutdown procedure and electrostatic handling controls before extraction.
Check node identity, network communication and intended host services before returning the system to normal operation.
Alternative Names
Technical notes
Installation relationship: The TS2 address block is located at board coordinate 21E. Its seven weighted positions represent 1 through 64 in binary weighting. Removing a jumper sets a binary 1, and the total count of removed positions, including parity, must be odd. Preserve the installed node address rather than copying an example setting.
Configuration: The identity and address-selection information applies to 51401946-100. Host-slot and peripheral relationships describe the WDA History Module arrangement; other hosts require their own installation mapping.
Technical reference: Honeywell History Module Service, HM13-501, December 2002.
FAQ View All FAQ
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What role does 51401946-100 perform?It is a K4LCN node processor board. In the WDA History Module, it handles the LCN-side processing path while the SPC and disk hardware perform separate peripheral functions.
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Where is the address block on 51401946-100?The applicable board design uses TS2 at coordinate 21E. Confirm the printed assembly marking and actual board layout before moving jumpers.
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What does a removed address jumper mean on 51401946-100?A removed jumper represents binary 1. The weighted address positions are 1, 2, 4, 8, 16, 32 and 64.
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What parity rule applies to address selection on 51401946-100?The total number of removed jumpers, including the parity position, must be odd.
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Can both boards select the LCN address for 51401946-100?Use a single approved address-selection location. When the processor selects the address, remove the LCN I/O jumpers or set the CLCN switches to zero as specified for the installed hardware.
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Which slot is used by 51401946-100 in a WDA History Module?The documented WDA History Module arrangement places the processor in front slot 1. This is a host-specific installation relationship, not a universal slot rule.
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What memory boundary should be retained for 51401946-100?The 51401946-100 processor board and its daughter-memory assembly are separate service items. The bare board number does not establish the installed memory capacity or the inclusion of a daughterboard.
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Does 51401946-100 include the complete disk interface?No. The History Module uses separate peripheral-controller and drive-interface assemblies. Match those components and the host configuration independently.
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